Silicon Labs /Series0 /EZR32HG /EZR32HG320F32R69 /USB /GRSTCTL

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Interpret as GRSTCTL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CSFTRST)CSFTRST 0 (PIUFSSFTRST)PIUFSSFTRST 0 (RXFFLSH)RXFFLSH 0 (TXFFLSH)TXFFLSH 0 (F0)TXFNUM0 (DMAREQ)DMAREQ 0 (AHBIDLE)AHBIDLE

TXFNUM=F0

Description

Reset Register

Fields

CSFTRST

Core Soft Reset

PIUFSSFTRST

PIU FS Dedicated Controller Soft Reset

RXFFLSH

RxFIFO Flush

TXFFLSH

TxFIFO Flush

TXFNUM

TxFIFO Number

0 (F0): Host mode: Non-periodic TxFIFO flush. Device: Tx FIFO 0 flush

1 (F1): Host mode: Periodic TxFIFO flush. Device: TXFIFO 1 flush.

2 (F2): Device mode: TXFIFO 2 flush.

3 (F3): Device mode: TXFIFO 3 flush.

4 (F4): Device mode: TXFIFO 4 flush.

5 (F5): Device mode: TXFIFO 5 flush.

6 (F6): Device mode: TXFIFO 6 flush.

16 (FALL): Flush all the transmit FIFOs in device or host mode.

DMAREQ

DMA Request Signal

AHBIDLE

AHB Master Idle

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